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1 date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation sp3223e/eb/eu intelligent +3.0v to +5.5v rs-232 transceivers features meets true eia/tia-232-f standards from a +3.0v to +5.5v power supply interoperable with eia/tia-232 and adheres to eia/tia-562 down to a +2.7v power source auto on-line ? circuitry automatically wakes up from a 1 a shutdown minimum 250kbps data rate under load (eb) 1 mbps data rate for high speed rs-232 (eu) regulated charge pump yields stable rs-232 outputs regardless of v cc variations esd specifications: +15kv human body model + 15kv iec1000-4-2 air discharge + 8kv iec1000-4-2 contact discharge description selection table applicable u.s. patents - 5,306,954; and other patents pending. ? now available in lead free packaging v- 1 2 3 4 17 18 19 20 5 6 7 16 15 14 shutdown c1+ v+ c1- c2+ c2- online en r 1 in gnd v cc t 1 out status 8 9 10 11 12 13 r 2 in r 2 out sp3223 t 2 out t 1 in t 2 in r 1 out the sp3223 products are rs-232 transceiver solutions intended for portable applications such as notebook and hand held computers. the sp3223 use an internal high-efficiency, charge-pump power supply that requires only 0.1 f capacitors in 3.3v operation. this charge pump and sipex's driver architecture allow the sp3223 series to deliver compliant rs-232 performance from a single power supply ranging from +3.3v to +5.0v. the sp3223 is a 2- driver/2-receiver device ideal for laptop/notebook computer and pda applications. the auto on-line ? feature allows the device to automatically "wake-up" during a shutdown state when an rs-232 cable is connected and a connected peripheral is turned on. otherwise, the device automatically shuts itself down drawing less than 1 a. e c i v e dr e w o p s e i l p p u s 2 3 2 - s r s r e v i r d 2 3 2 - s r s r e v i e c e r l a n r e t x e s t n e n o p m o c e n i l - n o o t u a ? y r t i u c r i c - 3 l t t e t a t s f o # s n i p d e e t n a r u a g e t a r a t a d d s e g n i t a r 3 2 2 3 p sv 5 . 5 + o t v 0 . 3 +22s r o t i c a p a c 4s e ys e y0 20 2 1v k 2 e 3 2 2 3 p sv 5 . 5 + o t v 0 . 3 +22s r o t i c a p a c 4s e ys e y0 20 2 1v k 5 1 b 3 2 2 3 p sv 5 . 5 + o t v 0 . 3 +22s r o t i c a p a c 4s e ys e y0 20 5 2v k 2 b e 3 2 2 3 p sv 5 . 5 + o t v 0 . 3 +22s r o t i c a p a c 4s e ys e y0 20 5 2v k 5 1 u 3 2 2 3 p sv 5 . 5 + o t v 0 . 3 +22s r o t i c a p a c 4s e ys e y0 20 0 0 1v k 2 u e 3 2 2 3 p sv 5 . 5 + o t v 0 . 3 +22s r o t i c a p a c 4s e ys e y0 20 0 0 1v k 5 1
date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation 2 absolute maximum ratings these are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability and cause permanent damage to the device. v cc .......................................................-0.3v to +6.0v v+ (note 1).......................................-0.3v to +7.0v v- (note 1)........................................+0.3v to -7.0v v+ + |v-| (note 1)...........................................+13v i cc (dc v cc or gnd current)......................... +100ma input voltages txin, online, shutdown, en ( sp3223 ).................-0.3v to +6.0v rxin................................................................... +15v output voltages txout............................................................. + 13.2v rxout, status.......................-0.3v to (v cc + 0.3v) short-circuit duration txout.....................................................continuous storage temperature......................-65 c to +150 c power dissipation per package 20-pin ssop (derate 9.25mw/ o c above +70 o c).... 750mw 20-pin tssop (derate 11.1mw/ o c above +70 o c)..900mw note 1 : v+ and v- can have maximum magnitudes of 7v, but their absolute difference cannot exceed 13v. unless otherwise noted, the following specifications apply for v cc = +3.0v to +5.5v with t amb = t min to t max . typical values apply at v cc = +3.3v or +5.0v and t amb = 25 c (note 2). electrical characteristics note 2 : c1 - c4 0.1 f, tested at 3.3v 10%. c1 = 0.047 f, c2-c4 = 0.33 f, tested at 5v 10%. r e t e m a r a p. n i m. p y t. x a ms t i n us n o i t i d n o c s c i t s i r e t c a r a h c c d , t n e r r u c y l p p u s e n i l - n o o t u a ? 0 . 10 1 a , d n g = e n i l n o , n e p o n i x r l l a v = n w o d t u h s c c v = n i x t , c c r o v , d n g c c t , v 3 . 3 + = b m a c 5 2 + = n w o d t u h s , t n e r r u c y l p p u s0 . 10 1 a v = n i x t , d n g = n w o d t u h s c c r o v , d n g c c t , v 3 . 3 + = b m a c 5 2 + = , t n e r r u c y l p p u s e n i l - n o o t u a ? d e l b a s i d 3 . 00 . 1a mv = n w o d t u h s = e n i l n o c c , v , d a o l o n c c t , v 3 . 3 + = b m a c 5 2 + = s t u p t u o r e v i e c e r d n a s t u p n i c i g o l d l o h s e r h t c i g o l t u p n i w o l h g i h d n g 0 . 2 8 . 0 v c c v v c c n i x t , v 0 . 5 + r o v 3 . 3 + =, ( n e 3 2 2 3 p s , e n i l n o , ) n w o d t u h s t n e r r u c e g a k a e l t u p n i1 0 . 0 0 . 1 a , n w o d t u h s , e n i l n o , n e , n i x t t b m a c 5 2 + =,v n i v o t v o = c c t n e r r u c e g a k a e l t u p t u o5 0 . 0 0 1 a , d e l b a s i d s r e v i e c e r v t u o v o t v o = c c w o l e g a t l o v t u p t u o4 . 0vi t u o a m 6 . 1 = h g i h e g a t l o v t u p t u ov c c 6 . 0 -v c c 1 . 0 -vi t u o a m 0 . 1 - =
3 date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation unless otherwise noted, the following specifications apply for v cc = +3.0v to +5.5v with t amb = t min to t max . typical values apply at v cc = +3.3v or +5.0v and t amb = 25 c (note 2). electrical characteristics note 2 : c1 - c4 0.1 f, tested at 3.3v 10%. c1 = 0.047 f, c2-c4 = 0.33 f, tested at 5v 10%. r e t e m a r a p. n i m. p y t. x a ms t i n us n o i t i d n o c s t u p t u o r e v i r d g n i w s e g a t l o v t u p t u o0 . 5 4 . 5 v k 3 h t i w d e d a o l s t u p t u o r e v i r d l l a ? t , d n g o t b m a c 5 2 + = e c n a t s i s e r t u p t u o0 0 3 ? v c c v , v 0 = - v = + v = t u o v 2 = t n e r r u c t i u c r i c - t r o h s t u p t u o5 3 0 7 0 6 0 0 1 a m v t u o v 0 = v t u o =v 5 1 t n e r r u c e g a k a e l t u p t u o5 2 a v c c , v 5 . 5 o t v 0 . 3 r o v 0 = v t u o d e l b a s i d s r e v i r d , v 2 1 = s t u p n i r e v i e c e r e g n a r e g a t l o v t u p n i5 1 -5 1v w o l d l o h s e r h t t u p n i6 . 02 . 1vv c c v 3 . 3 = w o l d l o h s e r h t t u p n i8 . 05 . 1vv c c v 0 . 5 = h g i h d l o h s e r h t t u p n i5 . 14 . 2vv c c v 3 . 3 = h g i h d l o h s e r h t t u p n i8 . 14 . 2vv c c v 0 . 5 = s i s e r e t s y h t u p n i3 . 0v e c n a t s i s e r t u p n i357k ? e n i l - n o o t u a v = n w o d t u h s , d n g = e n i l n o ( s c i t s i r e t c a r a h c y r t i u c r i c c c ) w o l e g a t l o v t u p t u o s u t a t s4 . 0vi t u o a m 6 . 1 = h g i h e g a t l o v t u p t u o s u t a t sv c c 6 . 0 -vi t u o a m 0 . 1 - = s r e v i r d o t d l o h s e r h t r e v i e c e r t ( d e l b a n e e n i l n o ) 0 0 2 s 4 1 e r u g i f e v i t a g e n r o e v i t i s o p r e v i e c e r h g i h s u t a t s o t d l o h s e r h t t ( h s t s ) 5 . 0 s 4 1 e r u g i f e v i t a g e n r o e v i t i s o p r e v i e c e r w o l s u t a t s o t d l o h s e r h t t ( l s t s ) 0 2 s 4 1 e r u g i f
date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation 4 unless otherwise noted, the following specifications apply for v cc = +3.0v to +5.5v with t amb = t min to t max . typical values apply at v cc = +3.3v or +5.0v and t amb = 25 c. timing characteristics r e t e m a r a p. n i m. p y t. x a ms t i n us n o i t i d n o c e t a r a t a d m u m i x a m e 3 2 2 3 p s0 2 15 3 2 s p b k r l k 3 = ? c , l e v i t c a r e v i r d e n o , f p 0 0 0 1 = b e 3 2 2 3 p s0 5 2 h e 3 2 2 3 p s0 6 4 u e 3 2 2 3 p s0 0 0 1r l k 3 = ? c , l e v i t c a r e v i r d e n o , f p 0 5 2 = y a l e d n o i t a g a p o r p r e v i e c e r t l h p 5 1 . 0 s c , t u p t u o r e v i e c e r o t t u p n i r e v i e c e r l = f p 0 5 1 t h l p e m i t e l b a n e t u p t u o r e v i e c e r0 0 2s n n o i t a r e p o l a m r o n e m i t e l b a s i d t u p t u o r e v i e c e r0 0 2s n n o i t a r e p o l a m r o n w e k s r e v i r d b e , e0 0 10 0 5 s nt | l h p t - h l p t , | b m a c o 5 2 = u e , h e0 50 0 1 w e k s r e v i e c e r0 0 20 0 0 1s n t | l h p t - h l p | e t a r w e l s n o i g e r - n o i t i s n a r t b e , e0 3 / v s v c c r , v 3 . 3 = l k 3 = ? t , b m a , c o 5 2 = v 0 . 3 + o t v 0 . 3 - m o r f n e k a t s t n e m e r u s a e m v 0 . 3 - o t v 0 . 3 + r o h e0 6 u e0 9
5 date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation figure 4. sp3223 typical operating circuit sp3223 2 4 6 5 3 7 19 gnd t 1 in t 2 in c1+ c1- c2+ c2- v+ v- v cc 13 12 0.1 f 0.1 f 0.1 f + c2 c5 c1 + + c3 c4 + + 0.1 f 0.1 f 17 8 rs-232 outputs rs-232 inputs ttl/cmos inputs +3v to +5v 18 shutdown 20 5k ? r 1 out 15 16 5k ? r 2 in r 2 out 10 9 ttl/cmos outputs en 1 online 14 r 1 in t 2 out t 1 out 11 status v cc to p supervisor circuit typical operating circuit
date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation 6 unless otherwise noted, the following performance characteristics apply for v cc = +3.3v, 250kbps data rate, all drivers loaded with 3k ? , 0.1 f charge pump capacitors, and t amb = +25 c. typical performance characteristics figure 1. transmitter output voltage vs. load capacitance for the sp3223eb figure 2. slew rate vs. load capacitance for the sp3223eb 30 25 20 15 10 5 0 0 500 1000 2000 3000 4000 5000 slew rate (v/ s) load capacitance (pf) - slew + slew 1 transmitter at 250kbps 1 transmitter at 15.6kbps all drivers loaded 3k + load cap 35 30 25 20 15 10 5 0 i cc (ma) load capacitance (pf) 0 1000 2000 3000 4000 5000 250kbps 125kbps 20kbps 1 transmitter at 250kbps 1 transmitter at 15.6kbps all drivers loaded 3k + load cap figure 3. supply current vs. load capacitance when transmitting data for the sp3223eb figure 4. supply current vs. supply voltage for the sp3243eb 20 15 10 5 0 2.7 3 3.5 4 4.5 5 supply voltage (v dc ) supply current (ma) 1 transmitter at 250kbps 2 transmitters at 15.6kbps all drivers loaded with 3k // 1000pf figure 5. transmitter output voltage vs. supply voltage for the sp3243eb 6 4 2 0 -2 -4 -6 0 1000 2000 3000 4000 5000 txout + txout - t ransmitter output v oltage (v dc ) load capacitance (pf) 6 4 2 0 -2 -4 -6 2.7 3 3.5 4 4.5 5 supply voltage (v dc ) t ransmitter output v oltage (v dc ) txout - txout +
7 date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation unless otherwise noted, the following performance characteristics apply for v cc = +3.3v, 1000kbps data rate, all drivers loaded with 3k ? , 0.1 f charge pump capacitors, and t amb = +25 c. figure 7 transmitter output voltage vs. supply voltage for the sp3223eu 2.7 3 3.5 4 4.5 5 supply voltage (v) t ransmitter output v oltage (v) 6 4 2 0 -2 -4 -6 1driver at 1mbps other drivers at 62.5kbps all drivers loaded with 3k // 250pf figure 11. transmitter output voltage vs. supply voltage for the sp3223eu 0 250 500 1000 1500 load capacitance (pf) supply current (ma) 35 30 25 20 15 10 5 0 t1 at 1mbps t2 at 62.5kbps 2.7 3 3.5 4 4.5 5 supply voltage (v) t ransmitter output v oltage (v) 6 4 2 0 -2 -4 -6 t1 at 1mbps t2 at 62.5kbps all drivers loaded with 3k//250pf figure 6. transmitter skew vs. load capacitance for the 3223eu 0 250 500 1000 1500 2000 200 150 100 50 0 load capacitance (pf) skew (ns) t1 at 500kbps t2 at 31.2kbps all tx loaded 3k // cload figure 8. transmitter output voltage vs. load capacitance for the sp3223eu figure 10. supply current vs. supply voltage for the sp3223eu 0 250 500 1000 1500 load capacitance (pf) t ransmitter output voltage (v) 6 4 2 0 -2 -4 -6 t1 at 1mbps t2 at 62.5kbps 2.7 3 3.5 4 4.5 5 supply voltage (v) supplycurrent (ma) 20 15 10 5 0 t1 at 1mbps t2 at 62.5kbps all drivers loaded with 3k//250pf figure 9. supply current vs. load capacitance for the sp3223eu typical performance characteristics
date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation 8 pin description e m a nn o i t c n u f# n i p n e o t h g i h c i g o l y l p p a . n o i t a r e p o l a m r o n r o f w o l c i g o l y l p p a . e l b a n e r e v i e c e r . ) e t a t s z - h g i h ( s t u p t u o r e v i e c e r e h t e l b a s i d 1 + 1 c . r o t i c a p a c p m u p - e g r a h c r e l b u o d e g a t l o v e h t f o l a n i m r e t e v i t i s o p 2 + v. p m u p e g r a h c e h t y b d e t a r e n e g t u p t u o v 5 . 5 + d e t a l u g e r 3 - 1 c . r o t i c a p a c p m u p - e g r a h c r e l b u o d e g a t l o v e h t f o l a n i m r e t e v i t a g e n 4 + 2 c. r o t i c a p a c p m u p - e g r a h c g n i t r e v n i e h t f o l a n i m r e t e v i t i s o p 5 - 2 c. r o t i c a p a c p m u p - e g r a h c g n i t r e v n i e h t f o l a n i m r e t e v i t a g e n 6 - v. p m u p e g r a h c e h t y b d e t a r e n e g t u p t u o v 5 . 5 - d e t a l u g e r 7 t 2 t u o. t u p t u o r e v i r d 2 3 2 - s r 8 r 2 n i. t u p n i r e v i e c e r 2 3 2 - s r 9 r 2 t u o. t u p t u o r e v i e c e r s o m c / l t t 0 1 s u t a t s. s u t a t s n w o d t u h s d n a e n i l n o g n i t a c i d n i t u p t u o s o m c / l t t 1 1 t 2 n i. t u p n i r e v i r d s o m c / l t t 2 1 t 1 n i. t u p n i r e v i r d s o m c / l t t 3 1 e n i l n o e d i r r e v o o t h g i h c i g o l y l p p a e n i l - n o o t u a e v i t c a s r e v i r d g n i p e e k y r t i u c r i c . ) 2 e l b a t o t r e f e r , h g i h c i g o l e b o s l a t s u m n w o d t u h s ( 4 1 r 1 t u o. t u p t u o r e v i e c e r s o m c / l t t 5 1 r 1 n i. t u p n i r e v i e c e r 2 3 2 - s r 6 1 t 1 t u o. t u p t u o r e v i r d 2 3 2 - s r 7 1 d n g. d n u o r g 8 1 v c c . e g a t l o v y l p p u s v 5 . 5 + o t v 0 . 3 + 9 1 n w o d t u h s l l a s e d i r r e v o s i h t . p m u p e g r a h c d n a s r e v i r d n w o d t u h s o t w o l c i g o l y l p p a e n i l - n o o t u a ? . ) 2 e l b a t o t r e f e r ( e n i l n o d n a y r t i u c r i c 0 2
9 date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation description the sp3223 is a 2-driver/2-receiver device ideal for portable or handheld applications. the sp3223 transceivers meet the eia/tia-232 and itu-t v.28/v.24 communication protocols and can be implemented in battery-powered, portable, or handheld applications such as note- book or handheld computers. the sp3223 de- vices feature sipex's proprietary and patented (u.s.-- 5,306,954) on-board charge pump cir- cuitry that generates 5.5v rs-232 voltage lev- els from a single +3.0v to +5.5v power supply. the sp3223 devices operate at this typical data rate when fully loaded. the sp3223 series is an ideal choice for power sensitive designs. featuring auto on-line circuitry, the sp3223 reduces the power supply drain to a 1 a supply current. in many portable or handheld applications, an rs-232 cable can be disconnected or a connected peripheral can be turned off. under these conditions, the internal charge pump and the drivers will be shut down. otherwise, the system automatically comes online. this feature allows design engineers to address power saving concerns without major design changes. theory of operation the sp3223 series is made up of four basic circuit blocks: 1. drivers, 2. receivers, 3. the sipex proprietary charge pump, and 4. auto on-line cir- cuitry. drivers the drivers are inverting level transmitters that convert ttl or cmos logic levels to 5.0v eia/ tia-232 levels with an inverted sense relative to the input logic levels. typically, the rs-232 output voltage swing is + 5.4v with no load and +5v minimum fully loaded. the driver outputs are protected against infinite short-circuits to ground without degradation in reliability. these drivers comply with the eia-tia-232f and all previous rs-232 versions. unused driver inputs should be connected to gnd or v cc . the drivers can guarantee output data rates fully loaded with 3k ? in parallel with 1000pf, (sp3223eu, c l = 250pf) ensuring compatibility with pc-to-pc communication software. the slew rate of the driver output on the e and eb versions is internally limited to a maximum of 30v/ s in order to meet the eia standards (eia rs-232d 2.1.7, paragraph 5). the slew rate of h and u versions is not limited to enable higher speed data tranfers. the transition of the loaded output from high to low also meets the mono- tonicity requirements of the standard. figure 12 shows a loopback test circuit used to test the rs-232 drivers. figure 13 shows the test results where one driver was active at 235kbps and all drivers are loaded with an rs-232 re- ceiver in parallel with a 1000pf capacitor. rs- 232 data transmission rate of 120kbps to 1mbps. provide compatibility with designs in personal computer peripherals and lan applications. figure 11. interface circuitry controlled by micropro- cessor supervisory circuit uart or serial c p supervisor ic v in reset sp3223 2 4 6 5 3 7 19 gnd t 1 in t 2 in c1+ c1- c2+ c2- v+ v- v cc 13 12 0.1 f 0.1 f 0.1 f + c2 c5 c1 + + c3 c4 + + 0.1 f 0.1 f 17 8 rs-232 outputs rs-232 inputs ttl/cmos inputs +3v to +5v 18 shutdown 20 5k ? r 1 out 15 16 5k ? r 2 in r 2 out 10 9 ttl/cmos outputs en 1 online 14 r 1 in t 2 out t 1 out 11 status v cc
date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation 10 receivers the receivers convert 5.0v eia/tia-232 levels to ttl or cmos logic output levels. receivers have an inverting output that can be disabled by using the en pin. receivers are active when the auto on-line circuitry is enabled or when in shutdown. during the shutdown, the receivers will continue to be active. if there is no activity present at the receivers for a period longer than 100 s or when shutdown is enabled, the device goes into a standby mode where the circuit draws 1 a. driving en to a logic high forces the outputs of the receivers into high-impedance. the truth table logic of the sp3223 driver and receiver outputs can be found in table 2 . since receiver input is usually from a transmis- sion line where long cable lengths and system interference can degrade the signal, the inputs have a typical hysteresis margin of 300mv. this ensures that the receiver is virtually immune to noisy transmission lines. should an input be left unconnected, an internal 5k ? pulldown resistor to ground will commit the output of the receiver to a high state. table 2. shutdown and en truth tables note: in auto on-line mode where online = gnd and shutdown = v cc , the device will shut down if there is no activity present at the receiver inputs. figure 12. loopback test circuit for rs-232 driver data transmission rates charge pump the charge pump is a sipex ?atented design (u.s. 5,306,954) and uses a unique approach compared to older less?fficient designs. the charge pump still requires four external capacitors, but uses a four?hase voltage shifting technique to attain symmetrical 5.5v power supplies. the internal power supply figure 13. loopback test circuit result at 235kbps (all drivers fully loaded) t1 in t1 out r1 out sp3223 2 4 6 5 3 7 19 gnd t 1 in t x in c1+ c1- c2+ c2- v+ v- v cc 0.1 f 0.1 f 0.1 f + c2 c5 c1 + + c3 c4 + + 0.1 f 0.1 f ttl/cmos inputs +3v to +5v 18 shutdown 20 5k ? r 1 out 5k ? r x in r x out ttl/cmos outputs en 1 online 14 r 1 in t x out t 1 out 11 status v cc to p supervisor circuit 1000pf 1000pf 3 2 2 3 p s : e c i v e d n w o d t u h sn et x t u or x t u o 00 z h g i he v i t c a 01 z h g i hz h g i h 10 e v i t c ae v i t c a 11 e v i t c az h g i h
11 date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation consists of a regulated dual charge pump that provides output voltages 5.5v regardless of the input voltage (v cc ) over the +3.0v to +5.5v range. this is important to maintain compliant rs-232 levels regardless of power supply fluctuations. the charge pump operates in a discontinuous mode using an internal oscillator. if the output voltages are less than a magnitude of 5.5v, the charge pump is enabled. if the output voltages exceed a magnitude of 5.5v, the charge pump is disabled. this oscillator controls the four phases of the voltage shifting. a description of each phase follows. phase 1 ?v ss charge storage ?during this phase of the clock cycle, the positive side of capacitors c 1 and c 2 are initially charged to v cc . c l + is then switched to gnd and the charge in c 1 is transferred to c 2 . since c 2 + is connected to v cc , the voltage potential across capacitor c 2 is now 2 times v cc . phase 2 ?v ss transfer ?phase two of the clock connects the negative terminal of c 2 to the v ss storage capacitor and the positive terminal of c 2 to gnd. this transfers a negative generated voltage to c 3 . this generated voltage is regulated to a minimum voltage of -5.5v. simultaneous with the transfer of the voltage to c 3 , the positive side of capacitor c 1 is switched to v cc and the negative side is connected to gnd. phase 3 ?v dd charge storage ?the third phase of the clock is identical to the first phase ?the charge transferred in c 1 produces ? cc in the negative terminal of c 1 , which is applied to the negative side of capacitor c 2 . since c 2 + is at v cc , the voltage potential across c 2 is 2 times v cc . phase 4 ?v dd transfer ?the fourth phase of the clock connects the negative terminal of c 2 to gnd, and transfers this positive generated voltage across c 2 to c 4 , the v dd storage capacitor. this voltage is regulated to +5.5v. at this voltage, the internal oscillator is disabled. simultaneous with the transfer of the voltage to c 4 , the positive side of capacitor c 1 is switched to v cc and the negative side is connected to gnd, allowing the charge pump cycle to begin again. the charge pump cycle will continue as long as the operational conditions for the internal oscillator are present. since both v + and v are separately generated from v cc , in a no?oad condition v + and v will be symmetrical. older charge pump approaches that generate v from v + will show a decrease in the magnitude of v compared to v + due to the inherent inefficiencies in the design. auto on-line ? circuitry the sp3223 devices have a patent pending auto on-line circuitry on board that saves power in applications such as laptop computers, pda's, and other portable systems. the sp3223 devices incorporate an auto on-line circuit that automatically enables itself when the external transmitters are enabled and the cable is connected. conversely, the auto on-line ? circuit also disables most of the internal circuitry when the device is not being used and goes into a standby mode where the device typically draws 1 a. this function can also be externally controlled by the online pin. when this pin is tied to a logic low, the auto on-line function is active. once active, the device is enabled until there is no activity on the receiver inputs. the receiver input typically sees at least 3v, which are generated from the transmitters at the other end of the cable with a 5v minimum. when the external transmitters are disabled or the cable is disconnected, the receiver inputs will be pulled down by their internal 5k ? resistors to ground. when this occurs over a period of time, the internal transmitters will be disabled and the device goes into a shutdown or standby mode. when online is high, the auto on-line mode is disabled.
date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation 12 the auto on-line circuit has two stages: 1) inactive detection 2) accumulated delay the first stage, shown in figure 20 , detects an inactive input. a logic high is asserted on r x inact if the cable is disconnected or the external transmitters are disabled. otherwise, r x inact will be at a logic low. this circuit is duplicated for each of the other receivers. the clock rate for the charge pump typically operates at above 250khz. the external capaci- tors can be as low as 0.1 f with a 16v break- down voltage rating. the second stage of the auto on-line circuitry, shown in figure 21 , processes all the receiver's r x inact signals with an accumu- lated delay that disables the device to a 1 a supply current. the status pin goes to a logic low when the cable is disconnected, the external transmitters are disabled, or the shutdown pin is invoked. the typical accumulated delay is around 20 s. when the sp3223 drivers or internal charge pump are disabled, the supply current is reduced to 1 a. this can commonly occur in handheld figure 14. auto on-line timing waveforms or portable applications where the rs-232 cable is disconnected or the rs-232 drivers of the connected peripheral are turned off. the auto on-line mode can be disabled by the shutdown pin. if this pin is a logic low, the auto on-line function will not operate regardless of the logic state of the online pin. table 3 summarizes the logic of the auto on-line operating modes. the truth table logic of the sp3223 driver and receiver outputs can be found in table 2. the status pin outputs a logic low signal if the device is shutdown. this pin goes to a logic high when the external transmitters are en- abled and the cable is connected. when the sp3223 devices are shut down, the charge pumps are turned off. v+ charge pump output decays to v cc ,the v- output decays to gnd. the decay time will depend on the size of capacitors used for the charge pump. once in shutdown, the time required to exit the shut down state and have valid v+ and v- levels is typically 200 s. for easy programming, the status can be used to indicate dtr or a ring indicator signal. tying online and shutdown together will bypass the auto on-line circuitry so this connection acts like a shutdown input pin receiver rs-232 input voltages status +5v 0v -5v t stsl t stsh t online v cc 0v driver rs-232 output voltages 0v +2.7v -2.7v s h u t d o w n
13 date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation figure 16. charge pump ?phase 2 figure 17. charge pump waveforms v cc = +5v ?0v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + ++ figure 18. charge pump ?phase 3 v cc = +5v ?v +5v ?v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + ++ figure 19. charge pump ?phase 4 v cc = +5v +10v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + ++ v cc = +5v ?v ?v +5v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + ++ figure 15. charge pump ?phase 1 ch1 2.00v ch2 2.00v m 1.00 s ch1 1.96v 2 1 t t [] t 2 +6v a) c 2+ b) c 2 - -6v 0v 0v
date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation 14 table 3. auto on-line logic figure 20. stage i of auto on-line circuitry figure 21. stage ii of auto on-line circuitry l a n g i s 2 3 2 - s r r e v i e c e r t a t u p n i n w o d t u h s t u p n i t u p n i e n i l n ot u p t u o s u t a t s r e v i e c s n a r t s u t a t s s e yh g i hw o lh g i h n o i t a r e p o l a m r o n e n i l - n o o t u a ( ? ) o nh g i hh g i hw o l n o i t a r e p o l a m r o n o nh g i hw o lw o l n w o d t u h s e n i l - n o o t u a ( ? ) s e yw o lw o l / h g i hh g i h n w o d t u h s o nw o lw o l / h g i hw o l n w o d t u h s rs-232 receiver block r x inact inactive detection block r x in r x out r 1 on r 2 on delay buffer delay buffer shutdown status
15 date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation ripple on the transmitter outputs and may slightly reduce power consumption. c2, c3, and c4 can be increased without changing c1? value for best charge pump efficiency locate the charge pump and bypass capacitors as close as possible to the ic. surface mount capacitors are best for this purpose. using capacitors with lower equivalent series resistance (esr) and self- inductance, along with minimizing parasitic pcb trace inductance will optimize charge pump operation. designers are also advised to consider that capacitor values may shift over time and operating temperature. the sipex-patented charge pumps are designed to operate reliably with a range of low cost capacitors.either polarized or non polarized capacitors may be used. if polarized capacitors are used they should be oriented as shown in the typical operating circuit. the v+ capacitor may be connected to either ground or vcc (polarity reversed.) the charge pump operates with 0.1 f capacitors for 3.3v operation. for other supply voltages, see the table for required capacitor values. do not use values smaller than those listed. increasing the capacitor values (e.g., by doubling in value) reduces e u l a v r o t i c a p a c p m u p e g r a h c d e d n e m m o c e r m u m i n i m v e g a t l o v t u p n i c c x x 2 3 p s r o f e u l a v r o t i c a p a c p m u p e g r a h c v 6 . 3 o t v 0 . 3 f u 1 . 0 = 4 c ? 1 c v 5 . 5 o t v 5 . 4f u 3 3 . 0 = 4 c - 2 c , f u 7 4 0 . 0 = 1 c v 5 . 5 o t v 0 . 3f u 2 2 . 0 = 4 c ? 1 c
date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation 16 esd tolerance the sp3223e series incorporates ruggedized esd cells on all driver output and receiver input pins. the esd structure is improved over our previous family for more rugged applications and environments sensitive to electro-static discharges and associated transients. the improved esd tolerance is at least +15kv without damage nor latch-up. there are different methods of esd testing applied: a) mil-std-883, method 3015.7 b) iec1000-4-2 air-discharge c) iec1000-4-2 direct contact the human body model has been the generally accepted esd testing method for semiconductors. this method is also specified in mil-std-883, method 3015.7 for esd testing. the premise of this esd test is to simulate the human body? potential to store electro-static energy and discharge it to an integrated circuit. the simulation is performed by using a test model as shown in figure 22 . this method will test the ic? capability to withstand an esd transient during normal handling such as in manufacturing areas where the ics tend to be handled frequently. the iec-1000-4-2, formerly iec801-2, is generally used for testing esd on equipment and systems. for system manufacturers, they must guarantee a certain amount of esd protection since the system itself is exposed to the outside environment and human presence. the premise with iec1000-4-2 is that the system is required to withstand an amount of static electricity when esd is applied to points and surfaces of the equipment that are accessible to personnel during normal usage. the transceiver ic receives most of the esd current when the esd source is applied to the connector pins. the test circuit for iec1000-4-2 is shown on figure 23 . there are two methods within iec1000-4-2, the air discharge method and the contact discharge method. with the air discharge method, an esd voltage is applied to the equipment under test (eut) through air. this simulates an electrically charged person ready to connect a cable onto the rear of the system only to find an unpleasant zap just before the person touches the back panel. the high energy potential on the person discharges through an arcing path to the rear panel of the system before he or she even touches the system. this energy, whether discharged directly or through air, is predominantly a function of the discharge current rather than the discharge voltage. variables with an air discharge such as approach speed of the object carrying the esd potential to the system and humidity will tend to change the discharge current. for example, the rise time of the discharge current varies with the approach speed. the contact discharge method applies the esd current directly to the eut. this method was devised to reduce the unpredictability of the esd arc. the discharge current rise time is constant since the energy is directly transferred without the air-gap arc. in situations such as hand held systems, the esd charge can be directly discharged to the equipment from a person already holding the equipment. the current is transferred on to the keypad or the serial port of the equipment directly and then travels through the pcb and finally to the ic. r c c s r s sw1 sw2 r c device under t est dc power source c s r s sw1 sw2 figure 22. esd test circuit for human body model
17 date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation device pin human body iec1000-4-2 tested model air discharge direct contact level driver outputs 15kv 15kv 8kv 4 receiver inputs 15kv 15kv 8kv 4 r s and r v add up to 330 ? f or iec1000-4-2. r s and r v add up to 330 ? for iec1000-4-2. contact-discharge module r v r c c s r s sw1 sw2 r c device under t est dc power source c s r s sw1 sw2 r v contact-discharge module the circuit model in figures 22 and 23 represent the typical esd testing circuit used for all three methods. the c s is initially charged with the dc power supply when the first switch (sw1) is on. now that the capacitor is charged, the second switch (sw2) is on while sw1 switches off. the voltage stored in the capacitor is then applied through r s , the current limiting resistor, onto the device under test (dut). in esd tests, the sw2 switch is pulsed so that the device under test receives a duration of voltage. for the human body model, the current limiting resistor (r s ) and the source capacitor (c s ) are 1.5k ? an 100pf, respectively. for iec-1000-4- 2, the current limiting resistor (r s ) and the source capacitor (c s ) are 330 ? an 150pf, respectively. the higher c s value and lower r s value in the iec1000-4-2 model are more stringent than the human body model. the larger storage capacitor injects a higher voltage to the test point when sw2 is switched on. the lower current limiting resistor increases the current charge onto the test point. figure 24. esd test waveform for iec1000-4-2 t=0ns t=30ns 0a 15a 30a t ? i ? figure 23. esd test circuit for iec1000-4-2 table 4. transceiver esd tolerance levels
date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation 18 package: 20 pin pdip ea eb e d1 d l a1 b b2 e b3 n 1 23 index area n/2 e e1 c b symbol min nom max a- - 0.21 a1 0.15 - - a2 0.115 0.13 0.195 b 0.014 0.018 0.022 b2 0.045 0.06 0.07 b3 0.3 0.039 0.045 c 0.008 0.01 0.014 d 0.98 1.03 1.06 d1 0.005 - - e 0.3 0.31 0.325 e1 0.24 0.25 0.28 e ea eb - - 0.43 l 0.115 0.13 0.15 note: dimensions in (mm) .100 bsc .300 bsc 20 pin pdip jedec ms-001 (ad) variation a a2 c
19 date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation package: 20 pin tssop seating plane a2 a a1 b see detail ?a? b b seaing plane l1 l ? detail a ? ? c b section b-b e1 e d index area d 2 x 2 e1 12 e symbol min nom max a--1.2 a1 0.05 - 0.15 a2 0.8 1 1.05 b0.19-0.3 c0.09-0.2 d6.46. 56.6 e e1 4.3 4.4 4.5 e ?1 0o - 8o ?2 ?3 l0.450 .6 0.75 l1 note: dimensions in (mm) 20 pin tssop jedec mo-153 (ac) variation 6.40 bsc 0.65 bsc 12o ref 12o ref 1.00 ref
date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation 20 package: 20 pin ssop b c with lead finish base metal seating plane a2 a a1 see detail ?a? l1 l seaing plane 2 nx r r1 a a detail a gauge plane section a-a d index area d 2 x 2 e1 n 1 2 e1 e b symbol min nom max a--2 a1 0.05 - - a2 1.65 1.75 1.85 b 0.22 - 0.38 c 0.09 - 0.25 d 6.9 7.2 7.5 e 7.4 7.8 8.2 e1 5 5.3 5.6 l 0.55 0.75 0.95 l1 ?0o4 o8o note: dimensions in (mm) 20 pin ssop jedec mo-153 (ae) variation 1.25 ref 20 pin ssop
21 date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation sp 3223 e u ey l /tr t ape and reel options ?l? suffix indicates lead free packaging package type a= ssop p=pdip y=tssop t emperature range c= commercial range 0oc to 70oc e= extended range -40oc to 85oc speed indicator blank= 120kbps b= 250kbps h= 450kbps u= 1mbps esd rating e= 15kv hbm and iec 1000-4 sipex part number product nomenclature
date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation 22 part number temperature range package types sp3223ebcp .................................................... 0 c to +70 c -------------------------------------------- 20-pin pdip sp3223ebca .................................................... 0 c to +70 c ------------------------------------------- 20-pin ssop sp3223ebca/tr .............................................. 0 c to +70 c ------------------------------------------- 20-pin ssop sp3223ebcy .................................................... 0 c to +70 c ----------------------------------------- 20-pin tssop sp3223ebcy/tr .............................................. 0 c to +70 c ----------------------------------------- 20-pin tssop sp3223ebep .................................................. -40 c to +85 c ------------------------------------------- 20-pin pdip sp3223ebea .................................................. -40 c to +85 c ------------------------------------------ 20-pin ssop sp3223ebea/tr ............................................ -40 c to +85 c ------------------------------------------ 20-pin ssop sp3223ebey .................................................. -40 c to +85 c ---------------------------------------- 20-pin tssop sp3223ebey/tr ............................................ -40 c to +85 c ---------------------------------------- 20-pin tssop sp3223eca ...................................................... 0 c to +70 c .................................................... 20-pin ssop sp3223eca/tr ................................................ 0 c to +70 c .................................................... 20-pin ssop sp3223ecp ...................................................... 0 c to +70 c ...................................................... 20-pin pdip sp3223ecy ...................................................... 0 c to +70 c .................................................. 20-pin tssop sp3223ecy/tr ................................................ 0 c to +70 c .................................................. 20-pin tssop sp3223eea ..................................................... -40 c to +85 c .................................................. 20-pin ssop sp3223eea/tr ............................................... -40 c to +85 c .................................................. 20-pin ssop sp3223eep ..................................................... -40 c to +85 c .................................................... 20-pin pdip sp3223eey ..................................................... -40 c to +85 c ................................................ 20-pin tssop sp3223eey/tr ............................................... -40 c to +85 c ................................................ 20-pin tssop sp3223eucp .................................................... 0 c to +70 c ...................................................... 20-pin pdip sp3223euca .................................................... 0 c to +70 c .................................................... 20-pin ssop sp3223euca/tr .............................................. 0 c to +70 c .................................................... 20-pin ssop sp3223eucy .................................................... 0 c to +70 c .................................................. 20-pin tssop sp3223eucy/tr .............................................. 0 c to +70 c .................................................. 20-pin tssop sp3223euep .................................................. -40 c to +85 c .................................................... 20-pin pdip sp3223euea .................................................. -40 c to +85 c .................................................. 20-pin ssop sp3223euea/tr ............................................ -40 c to +85 c .................................................. 20-pin ssop sp3223euey .................................................. -40 c to +85 c ................................................ 20-pin tssop sp3223euey/tr ............................................ -40 c to +85 c ................................................ 20-pin tssop available in lead free packaging. to order add "-l" suffix to part number. example: sp3223euey/tr = standard; sp3223euey-l/tr = lead free /tr = tape and reel pack quantity is 1,500 for ssop, tssop and wsoic . ordering information click here to order samples
23 date: 12/16/04 sp3223 +3.0v to +5.5v rs-232 transceivers ? copyright 2004 sipex corporation ordering information sipex corporation reserves the right to make changes to any products described herein. sipex does not assume any liability aris ing out of the application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others. contact factory for availability of the following legacy part numbers. for long term availability sipex recommends upgrades as listed below. all upgrade part numbers shown are fully pinout and function compatible with legacy part numbers. upgrade part numbers may contain feature and/or performance enhancements or other changes to datasheet parameters. legacy part number recommended upgrade sp3223bca sp3223ebca sp3223bca/tr sp3223ebca/tr sp3223bca-l sp3223ebca-l sp3223bca-l/tr sp3223ebca-l/tr sp3223bcp sp3223ebcp sp3223bcy sp3223ebcy sp3223bcy/tr sp3223ebcy/tr sp3223bcy-l sp3223ebcy-l sp3223bcy-l/tr sp3223ebcy-l/tr sp3223bea sp3223ebea sp3223bea/tr sp3223ebea/tr sp3223bea-l sp3223ebea-l sp3223bea-l/tr sp3223ebea-l/tr sp3223bep sp3223ebep sp3223bey sp3223ebey sp3223bey/tr sp3223ebey/tr sp3223bey-l sp3223ebey-l sp3223bey-l/tr sp3223ebey-l/tr sp3223ca sp3223eca sp3223ca/tr sp3223eca/tr sp3223ca-l sp3223eca-l sp3223ca-l/tr sp3223eca-l/tr sp3223cp sp3223ecp sp3223cy sp3223ecy sp3223cy/tr sp3223ecy/tr sp3223cy-l sp3223ecy-l sp3223cy-l/tr sp3223ecy-l/tr sp3223ea sp3223eea sp3223ea/tr sp3223eea/tr sp3223ea-l sp3223eea-l sp3223ea-l/tr sp3223eea-l/tr sp3223ehca sp3223euca sp3223ehca/tr sp3223euca/tr sp3223ehca-l sp3223euca-l sp3223ehca-l/tr sp3223euca-l/tr sp3223ehcp sp3223eucp legacy part number recommended upgrade sp3223ehcy sp3223eucy sp3223ehcy/tr sp3223eucy/tr SP3223EHCY-L sp3223eucy-l SP3223EHCY-L/tr sp3223eucy-l/tr sp3223ep sp3223eep sp3223ey sp3223eey sp3223ey/tr sp3223eey/tr sp3223ey-l sp3223eey-l sp3223ey-l/tr sp3223eey-l/tr sp3223hca sp3223euca sp3223hca/tr sp3223euca/tr sp3223hca-l sp3223euca-l sp3223hca-l/tr sp3223euca-l/tr sp3223hcp sp3223eucp sp3223hcy sp3223eucy sp3223hcy/tr sp3223eucy/tr sp3223hcy-l sp3223eucy-l sp3223hcy-l/tr sp3223eucy-l/tr sp3223uca sp3223euca sp3223uca/tr sp3223euca/tr sp3223uca-l sp3223euca-l sp3223uca-l/tr sp3223euca-l/tr sp3223ucp sp3223eucp sp3223ucy sp3223eucy sp3223ucy/tr sp3223eucy/tr sp3223ucy-l sp3223eucy-l sp3223ucy-l/tr sp3223eucy-l/tr sp3223uea sp3223euea sp3223uea/tr sp3223euea/tr sp3223uea-l sp3223euea-l sp3223uea-l/tr sp3223euea-l/tr sp3223uep sp3223euep sp3223uey sp3223euey sp3223uey/tr sp3223euey/tr sp3223uey-l sp3223euey-l sp3223uey-l/tr sp3223euey-l/tr

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